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CY7C168A
4Kx4 RAM
Features
* Automatic power-down when deselected * CMOS for optimum speed/power * High speed -- tAA = 15 ns * Low active power -- 633 mW * Low standby power -- 110 mW * TTL-compatible inputs and outputs * VIH of 2.2V * Capable of withstanding greater than 2001V electrostatic discharge
Functional Description
The CY7C168A is a high-performance CMOS static RAM organized as 4096 by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. The CY7C168A has an automatic power-down feature, reducing the power consumption by 77% when deselected. Writing to the device is accomplished when the Chip Select (CE) and Write Enable (WE) inputs are both LOW. Data on the four data input/output pins (I/O0 through I/O3) is written into the memory location specified on the address pins (A0 through A11). Reading the device is accomplished by taking the Chip Enable (CE) LOW, while Write Enable (WE) remains HIGH. Under these conditions, the contents of the location specified on the address pins will appear on the four data input/output pins (I/O0 through I/O3). The input/output pins remain in a high-impedance state when Chip Enable (CE) is HIGH or Write Enable (WE) is LOW. A die coat is used to insure alpha immunity.
Logic Block Diagram
Pin Configurations
DIP/SOJ Top View A4 A5 A6 A7 A8 A9 A10 A11 CE GND
1 2 3 4 5 6 7 8 9 10 20 19 18 17 7C168A 16 \ 15 14 13 12 11
INPUTBUFFER
A0 A1 A2 A3 A4 A5 A6
ROW DECODER
I/O0
SENSE AMP 128 x 128 ARRAY
I/O1 I/O2 I/O3
VCC A3 A2 A1 A0 I/O 0 I/O 1 I/O 2 I/O 3 WE
C168A-2
COLUMN DECODER
POWER DOWN (7C168A)
CE WE
A7 A8 A9 A10 A11
C168A-1
Selection Guide
7C168A-15 Maximum Access Time (ns) Maximum Operating Current (mA) Commercial Military 15 115 7C168A-20 20 90 100 7C168A-25 25 90 100 7C168A-35 35 90 100 7C168A-45 45 90 100
Cypress Semiconductor Corporation
*
3901 North First Street
*
San Jose
*
CA 95134
*
408-943-2600 February 3, 2000
CY7C168A
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .....................................-65C to +150C Ambient Temperature with Power Applied ..................................................-55C to +125C Supply Voltage to Ground Potential (Pin 20 to Pin 10)................................................ -0.5V to +7.0V DC Voltage Applied to Outputs in High Z State .................................................... -0.5V to +7.0V DC Input Voltage .................................................-3.0V to +7.0V Output Current into Outputs (Low) .............................. 20 mA Static Discharge Voltage ........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current ..................................................... >200 mA
Operating Range
Range Commercial Military
[1]
Ambient Temperature 0C to +70C -55C to +125C
VCC 5V 10% 5V 10%
Electrical Characteristics Over the Operating Range[2]
7C168A-15 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB1 ISB2 Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current Output Leakage Current Output Short Circuit Current[4] VCC Operating Supply Current Automatic CE Power-Down Current Automatic CE Power-Down Current
[3]
7C168A-20 Min. 2.4 Max. 0.4 2.2 -0.5 -10 -10 VCC 0.8 +10 +10 -350 90 100 40 40 20 20 mA mA Unit V V V V A A mA mA
Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL = 8.0 mA
Min. 2.4
Max. 0.4
2.2 -0.5 GND < VI < VCC GND < VO < VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA Max. VCC, CE > VIH Max. VCC, CE > VCC - 0.3V Com'l Mil Com'l Mil Com'l Mil -10 -10
VCC 0.8 +10 +10 -350 115 40 20 -
Notes: 1. TA is the "instant on" case temperature. 2. See the last page of this specification for Group A subgroup testing information. 3. VIL min. = -3.0V for pulse durations less than 30 ns. 4. Not more than 1 output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
2
CY7C168A
Electrical Characteristics Over the Operating Range[2] (continued)
7C168A-25 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB1 ISB2 Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current Output Leakage Current Output Short Circuit Current[4] VCC Operating Supply Current Automatic CE Power-Down Current Automatic CE Power-Down Current
[3]
7C168A-35 Min. 2.4 Max. 0.4 2.2 -0.5 -10 -50 VCC 0.8 10 50 -350 90 100 20 20 20 20
7C168A-45 Min. 2.4 0.4 2.2 -0.5 -10 -50 VCC 0.8 10 50 -350 90 100 20 20 20 20 mA mA Max. Unit V V V V A A mA mA
Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL = 8.0 mA
Min. 2.4
Max. 0.4
2.2 -0.5 GND < V I < VCC GND < VO < VCC Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA Max. VCC, CE > VIH Max. VCC, CE > VCC - 0.3 V Com'l Mil Com'l Mil Com'l Mil -10 -10
VCC 0.8 +10 +10 -350 90 100 20 20 20 20
Capacitance[5]
Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 5.0V Max. 10 10 Unit pF pF
Note: 5. Tested initially and after any design or process changes that may affect these parameters.
AC Test Loads and Waveforms
5V OUTPUT 30 pF INCLUDING JIG AND SCOPE R2 255 R1 481 5V OUTPUT 5 pF INCLUDING JIG AND SCOPE R2 255 R1 481 ALL INPUT PULSES 3.0V GND < 5 ns 90% 10% 90% 10% < 5 ns
C168A-4
(a)
(b)
C168A-3
Equivalent to:
THEVENIN EQUIVALENT 167 OUTPUT 1.73V
3
CY7C168A
Switching Characteristics Over the Operating Range[2,6]
7C168A-15 Parameter READ CYCLE tRC tAA tOHA tACE tLZCE tHZCE tPU tPD tRCS tRCH tWC tSCE tAW tHA tSA tPWE tSD tHD tLZWE tHZWE Read Cycle Time Address to Data Valid Output Hold from Address Change Power Supply Current CE LOW to Low Z[7] CE HIGH to High Z
[7, 8]
7C168A-20 Min. 20 Max.
7C168A-25 Min. 25 Max.
7C168A-35 Min. 35 Max.
7C168A-45 Min. 45 Max. Unit ns 45 5 45 5 15 0 25 0 0 40 30 30 0 0 20 15 0 5 10 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Description
Min. 15
Max.
15 5 15 5 8 0 15 0 0 15 12 12 0 0 12 10 0 7 5 0 0 20 15 15 0 0 15 10 0 7 5 0 5 5
20 5 20 5 8 0 20 0 0 20 20 20 0 0 15 10 0 7 5
25 5 25 5 10 0 20 0 0 25 25 25 0 0 20 15 0 5 5
35 35 15 20
CE LOW to Power Up CE HIGH to Power-Down Read Command Set-Up Read Command Hold
[9]
WRITE CYCLE
Write Cycle Time CE LOW to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE HIGH to Low Z
[7]
WE LOW to High Z[7, 8]
Switching Waveforms
Read Cycle No. 1 [10, 11]
ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID
C168A-5
tRC
Notes: 6. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance. 7. At any given temperature and voltage condition, tHZ is less than tLZ for all devices. Transition is measured 500 mV from steady state voltage with specified loading in part (b) of AC Test Loads and Waveforms. 8. tHZCE and tHZWE are tested with CL = 5 pF as in part (a) of Test Loads and Waveforms. Transition is measured 500 mV from steady state voltage. 9. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signal must be LOW to initiate a write and either signal can terminate a write by going high. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 10. WE is HIGH for read cycle. 11. Device is continuously selected, CE = VIL.
4
CY7C168A
Switching Waveforms (continued)
Read Cycle
CE tACE tLZCE DATA OUT VCC SUPPLY CURRENT HIGH IMPEDANCE tPU 50% DATA VALID tPD ICC 50% ISB tHZCE HIGH IMPEDANCE
[10, 12]
tRC
WE tRCS
tRCH
C168A-6
Write Cycle No. 1 (WE Controlled)
[9]
tWC ADDRESS tSCE CE tSA WE tSD DATA IN DATAIN VALID tHZWE DATA I/O DATA UNDEFINED tLZWE HIGH IMPEDANCE
C168A-7
tAW tPWE
tHA
tHD
Write Cycle No. 2 (CS Controlled)
ADDRESS tSA CE
[9, 13]
tWC
tSCE
tAW tPWE WE tSD DATA IN DATA IN VALID tHZWE tHD
tHA
HIGH IMPEDANCE DATA I/O DATA UNDEFINED
C168A-8
Notes: 12. Address valid prior to or coincident with CE transition LOW. 13. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
5
CY7C168A
Typical DC and AC Characteristics
OUTPUT SOURCE CURRENT (mA) NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.4 NORMALIZED I CC, I SB 1.2 1.0 0.8 0.6 0.4 0.2 0.0 4.0 4.5 ISB 5.0 5.5 6.0 0.0 -55 ICC VIN = 5.0V TA = 25C NORMALIZED I CC , I SB 1.2 1.0 0.8 0.6 0.4 0.2 ISB 25 125 VCC = 5.0V VIN = 5.0V ICC NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 VCC = 5.0V TA = 25C
SUPPLY VOLTAGE (V)
AMBIENT TEMPERATURE (C)
OUTPUT VOLTAGE (V)
OUTPUT SINK CURRENT (mA)
NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 1.4 NORMALIZED t AA NORMALIZED tAA 1.3 1.2 1.1 TA = 25C 1.0 0.9 0.8 4.0 4.5 5.0 5.5 6.0 1.6 1.4 1.2 1.0
NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE
OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 VCC = 5.0V TA = 25C
VCC = 5.0V 0.8 0.6 -55
25
125
SUPPLY VOLTAGE (V)
AMBIENT TEMPERATURE (C)
OUTPUT VOLTAGE (V)
TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE 3.0 NORMALIZED I PO 2.5 DELTA tAA (ns) 2.0 1.5 1.0 0.5 0.0 0.0 1.0 2.0 3.0 4.0 5.0
TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 NORMALIZED I CC 25.0 20.0 15.0 10.0 5.0 0.0 0 200 400 VCC = 4.5V TA = 25C
NORMALIZED I CC vs.CYCLE TIME 1.1
1.0
0.9
600
800 1000
0.8 10
20
30
40
SUPPLY VOLTAGE (V)
CAPACITANCE (pF)
CYCLE FREQUENCY (MHz)
6
CY7C168A
Ordering Information
Speed (ns) 15 20 ICC (mA) 115 90 Ordering Code CY7C168A-15PC CY7C168A-15VC CY7C168A-20PC CY7C168A-20VC CY7C168A-20DMB 25 70 80 35 70 CY7C168A-25PC CY7C168A-25VC CY7C168A-25DMB CY7C168A-35PC CY7C168A-35VC CY7C168A-35DMB 45 70 CY7C168A-45PC CY7C168A-45VC CY7C168A-45DMB Package Name P5 V5 P5 V5 D6 P5 V5 D6 P5 V5 D6 P5 V5 D6 Package Type 20-Lead (300-Mil) Molded DIP 20-Lead Molded SOJ 20-Lead (300-Mil) Molded DIP 20-Lead Molded SOJ 20-Lead (300-Mil) CerDIP 20-Lead (300-Mil) Molded DIP 20-Lead Molded SOJ 20-Lead (300-Mil) CerDIP 20-Lead (300-Mil) Molded DIP 20-Lead Molded SOJ 20-Lead (300-Mil) CerDIP 20-Lead (300-Mil) Molded DIP 20-Lead Molded SOJ 20-Lead (300-Mil) CerDIP Military Military Commercial Military Commercial Military Commercial Commercial Operating Range Commercial
MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics
Parameter VOH VOL VIH VIL Max. IIX IOZ ICC ISB1 ISB2 Document #: 38-00095-E Subgroups 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 tRC tAA tOHA tACE tRCS tRCH WRITE CYCLE tWC tSCE tAW tHA tSA tPWE tSD tHD 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11
Switching Characteristics
Parameter READ CYCLE 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 Subgroups
7
CY7C168A
Package Diagrams
20-Lead (300-Mil) CerDIP D6
MIL-STD-1835 D-8 Config. A
51-80029
20-Lead (300-Mil) Molded DIP P5
51-85011-A
8
CY7C168A
Package Diagrams (continued)
20-Lead (300-Mil) Molded SOJ V5
51-85029-A
(c) Cypress Semiconductor Corporation, 2000. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

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